The present invention relates generally to integrated circuits, and more specifically, to a pad system for an integrated circuit or device.
Particularly disclosed herein is a pad system where the number of pads of a semiconductor chip can be greatly reduced as compared to prior art pad systems. One pad can be used for multiple testing purposes, and/or be shared by different applications, including customizing, testing, debugging, monitoring, data retrieving, voltage/power supplying, etc.
During the manufacture of an integrated circuit (IC) or device, access points are provided which remain accessible after completion of the manufacturing process. These access points or pads form a pad system which is situated on the integrated circuit or device. Each pad of the pad system is electrically connected to points within the integrated circuit or device, especially to points that would otherwise be inaccessible. The pads traditionally function as signal ports, power input or output ports, and/or test points that allow individual sections of the integrated circuit or device to be accessed and tested, monitored and/or configured for differing applications.
As integrated circuit and devices have become more and more complex with the improvement of technology, a greater number of pads are required to fully access the integrated circuit or device and accurately test, monitor and configure the integrated circuit or device. Even at this stage in the development of integrated circuits and devices, the number of pads required to comprehensively test, monitor and configure the integrated circuit or device has surpassed the available space for the pads themselves. Accordingly, a pad system is required which uses less area of an integrated circuit or device than prior art pad systems.
It is, therefore, an aspect of the present invention to provide a pad system for an integrated circuit or device where one pad is used to test various sections of the integrated circuit or device.
It is another aspect of the present invention to provide a pad system for an integrated circuit or device for changing bonding connections within the integrated circuit or device.
It is a further aspect of the present invention to provide a pad system for an integrated circuit or device for changing pad connections to supply and/or monitor voltages within the integrated circuit or device.
It is still a further aspect of the present invention to provide a pad system for an integrated circuit or device for changing pad connections to test programming of the integrated circuit or device.
The above aspects can be achieved by the present invention which provides a pad system for an integrated circuit or device. The pad system includes logic circuitry having at least one pad input terminal for connecting to at least one pad and at least two output terminals for connecting to at least one circuit system of the integrated circuit or device. The logic circuitry is configurable to selectively connect the at least one pad between at least two points of the at least one circuit system of the integrated circuit or device.